Twitter user “Wild_C” has updated his render images for the upcoming RDNA 3 GPUs Navi 31 to 33 and adapted them to the latest speculation on the technical data. Whether the GPUs will actually look like this is unclear, however, as these are not official illustrations.
As early as July, the Twitter user “Wild_C” showed render images for the Navi 31, 32 and 33 chips from AMD’s upcoming RDNA 3 GPU architecture and named the possible die sizes. The website Angstronomics corrected the previously rumored data last weekend. Navi 31 and 32 should therefore be equipped with less Infinity Cache and the die areas of the MCD chips should also be smaller. However, the flagship GPU can still access the 384-bit memory connection.
New render images for the navigation chips
Wild_C then got to work and created new render images for the navigation chips based on the newly obtained information. The fresh images now show a new layout of the GPUs, i.e. the arrangement of the GCDs and MCDs on Navi 31 and 32, as well as the monolithic design of Navi 33, which is now angled. It should be noted that these images are not official and that AMD does not have to adopt this design. Just because the die sizes are correct, the length and width of the chips can still vary.
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According to Angstronomics data, the size of the flagship Navi 31 is 533mm², divided into a 308mm² GCD and six 37.5mm² MCDs. This is followed by the Navi 32 with 350 mm² and the smallest Navi 31 chip with 203 mm². An error seems to have crept in with the render image of Navi 33, because it was supposed to use the PCI Express 5.0 x8 interface instead of x16. Published to match the render images 3Dcenter.org also a list of eligible graphics card models based on the three Navi chips from AMD’s upcoming RDNA 3 generation.