RDNA 3: Navi 31 only with 96 MiB Infinity Cache?

AMD’s RDNA 3 architecture is said to be the first multi-chip design (MCD) in the graphics card market where there is not a single monolithic die, but rather multiple individual chips. The concept is similar to that of AMD’s in-house processors, which can also be scaled in this way, giving AMD the advantage of lower manufacturing costs compared to large monolithic dies. In contrast to RDNA 2, however, the large expansion or the large chip version is no longer used for the middle class, but actually only for the high-end area.

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Therefore, a rumored Radeon RX 7900 XT can also access a full 384-bit wide memory interface. Compared to RDNA 2, there is therefore no need for larger amounts of Infinity Cache, which was able to compensate for the narrow interface of these cards. Therefore, according to information from the “Angstronomics” website, instead of the previously assumed 192 MiB Infinity Cache, only 96 MiB Cache should actually be installed in the large model.

But the cards with Navi 32 chips should also receive less cache than originally expected. Only 64 MiB are planned here. At the same time, the chip itself does not appear to be fully expanded with 64 compute units, but only offers 60 compute units. As a result, the graphics card does not have 8,192 shader units as previously assumed, but only 7,680.

The actual dies of the new MCD chips should also be smaller than assumed. A Navi-31 GCD should only have an area of ​​308 mm², while the MCD chips measure 37.5 mm². A full Navi 31 die would have an area of ​​533 mm², with Navi 32 it should be 350 mm², while Navi 33 only has 203 mm².

Source: Videocardz